Dustin Feld
Hrsg.: Fraunhofer SCAI
2017, 329 S., num., mostly col. illus. and tab., Softcover
Sprache: Englisch
Köln, Univ., Diss., 2016
Fraunhofer Verlag
ISBN 978-3-8396-1155-5
Inhalt
This work presents the FieldPlacer framework, a flexible, fast and unconstrained force-directed placement method for heterogeneous reconfigurable logic architectures, in particular for the ever important heterogeneous FPGAs. In contrast to many other force-directed placers, this approach is called 'unconstrained' as it does not require a priori fixed logic elements in order to calculate a force equilibrium as the solution to a system of equations. Instead, it is based on a free spring embedder simulation of a graph representation which includes all logic block types of a design simultaneously. The FieldPlacer framework offers a huge amount of flexibility in applying different distance norms (e. g., the Manhattan distance) for the force-directed layout and aims at creating adapted layouts for various objective functions, e. g., highest performance or improved routability. Depending on the individual situation, a runtime-quality trade-off can be considered to either produce a decent placement in a very short time or to generate an exceptionally good placement, which takes longer.
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Fraunhofer SCAI, computer architecture & logic design, combinatorics & graph theory, algorithms & data structures, Integrierte Schaltungen und Komponenten, Computerarchitektur, Logikdesign, Kombinatorik, Graphentheorie, Algorithmen und Datenstrukturen, Rekonfigurierbare Logik-Architektur, Hardware-Architektur, Informatiker, Schaltkreis-Entwickler, Compiler-Entwickler, Programmierer, Elektrotechniker,
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